x86 and amd64 instruction reference

Derived from the May 2019 version of the Intel® 64 and IA-32 Architectures Software Developer’s Manual. Last updated 2019-05-30.

THIS REFERENCE IS NOT PERFECT. It's been mechanically separated into distinct files by a dumb script. It may be enough to replace the official documentation on your weekend reverse engineering project, but for anything where money is at stake, go get the official and freely available documentation.

Core Instructions

MnemonicSummary
AAAASCII Adjust After Addition
AADASCII Adjust AX Before Division
AAMASCII Adjust AX After Multiply
AASASCII Adjust AL After Subtraction
ADCAdd with Carry
ADCXUnsigned Integer Addition of Two Operands with Carry Flag
ADDAdd
ADDPDAdd Packed Double-Precision Floating-Point Values
ADDPSAdd Packed Single-Precision Floating-Point Values
ADDSDAdd Scalar Double-Precision Floating-Point Values
ADDSSAdd Scalar Single-Precision Floating-Point Values
ADDSUBPDPacked Double-FP Add/Subtract
ADDSUBPSPacked Single-FP Add/Subtract
ADOXUnsigned Integer Addition of Two Operands with Overflow Flag
AESDECPerform One Round of an AES Decryption Flow
AESDECLASTPerform Last Round of an AES Decryption Flow
AESENCPerform One Round of an AES Encryption Flow
AESENCLASTPerform Last Round of an AES Encryption Flow
AESIMCPerform the AES InvMixColumn Transformation
AESKEYGENASSISTAES Round Key Generation Assist
ANDLogical AND
ANDNLogical AND NOT
ANDNPDBitwise Logical AND NOT of Packed Double Precision Floating-Point Values
ANDNPSBitwise Logical AND NOT of Packed Single Precision Floating-Point Values
ANDPDBitwise Logical AND of Packed Double Precision Floating-Point Values
ANDPSBitwise Logical AND of Packed Single Precision Floating-Point Values
ARPLAdjust RPL Field of Segment Selector
BEXTRBit Field Extract
BLENDPDBlend Packed Double Precision Floating-Point Values
BLENDPSBlend Packed Single Precision Floating-Point Values
BLENDVPDVariable Blend Packed Double Precision Floating-Point Values
BLENDVPSVariable Blend Packed Single Precision Floating-Point Values
BLSIExtract Lowest Set Isolated Bit
BLSMSKGet Mask Up to Lowest Set Bit
BLSRReset Lowest Set Bit
BNDCLCheck Lower Bound
BNDCNCheck Upper Bound
BNDCUCheck Upper Bound
BNDLDXLoad Extended Bounds Using Address Translation
BNDMKMake Bounds
BNDMOVMove Bounds
BNDSTXStore Extended Bounds Using Address Translation
BOUNDCheck Array Index Against Bounds
BSFBit Scan Forward
BSRBit Scan Reverse
BSWAPByte Swap
BTBit Test
BTCBit Test and Complement
BTRBit Test and Reset
BTSBit Test and Set
BZHIZero High Bits Starting with Specified Bit Position
CALLCall Procedure
CBWConvert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword
CDQConvert Word to Doubleword/Convert Doubleword to Quadword
CDQEConvert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword
CLACClear AC Flag in EFLAGS Register
CLCClear Carry Flag
CLDClear Direction Flag
CLDEMOTECache Line Demote
CLFLUSHFlush Cache Line
CLFLUSHOPTFlush Cache Line Optimized
CLIClear Interrupt Flag
CLTSClear Task-Switched Flag in CR0
CLWBCache Line Write Back
CMCComplement Carry Flag
CMOVccConditional Move
CMPCompare Two Operands
CMPPDCompare Packed Double-Precision Floating-Point Values
CMPPSCompare Packed Single-Precision Floating-Point Values
CMPSCompare String Operands
CMPSBCompare String Operands
CMPSDCompare String Operands
CMPSD (1)Compare Scalar Double-Precision Floating-Point Value
CMPSQCompare String Operands
CMPSSCompare Scalar Single-Precision Floating-Point Value
CMPSWCompare String Operands
CMPXCHGCompare and Exchange
CMPXCHG16BCompare and Exchange Bytes
CMPXCHG8BCompare and Exchange Bytes
COMISDCompare Scalar Ordered Double-Precision Floating-Point Values and Set EFLAGS
COMISSCompare Scalar Ordered Single-Precision Floating-Point Values and Set EFLAGS
CPUIDCPU Identification
CQOConvert Word to Doubleword/Convert Doubleword to Quadword
CRC32Accumulate CRC32 Value
CVTDQ2PDConvert Packed Doubleword Integers to Packed Double-Precision Floating-Point Values
CVTDQ2PSConvert Packed Doubleword Integers to Packed Single-Precision Floating-Point Values
CVTPD2DQConvert Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
CVTPD2PIConvert Packed Double-Precision FP Values to Packed Dword Integers
CVTPD2PSConvert Packed Double-Precision Floating-Point Values to Packed Single-Precision Floating-Point Values
CVTPI2PDConvert Packed Dword Integers to Packed Double-Precision FP Values
CVTPI2PSConvert Packed Dword Integers to Packed Single-Precision FP Values
CVTPS2DQConvert Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values
CVTPS2PDConvert Packed Single-Precision Floating-Point Values to Packed Double-Precision Floating-Point Values
CVTPS2PIConvert Packed Single-Precision FP Values to Packed Dword Integers
CVTSD2SIConvert Scalar Double-Precision Floating-Point Value to Doubleword Integer
CVTSD2SSConvert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
CVTSI2SDConvert Doubleword Integer to Scalar Double-Precision Floating-Point Value
CVTSI2SSConvert Doubleword Integer to Scalar Single-Precision Floating-Point Value
CVTSS2SDConvert Scalar Single-Precision Floating-Point Value to Scalar Double-Precision Floating-Point Value
CVTSS2SIConvert Scalar Single-Precision Floating-Point Value to Doubleword Integer
CVTTPD2DQConvert with Truncation Packed Double-Precision Floating-Point Values to Packed Doubleword Integers
CVTTPD2PIConvert with Truncation Packed Double-Precision FP Values to Packed Dword Integers
CVTTPS2DQConvert with Truncation Packed Single-Precision Floating-Point Values to Packed Signed Doubleword Integer Values
CVTTPS2PIConvert with Truncation Packed Single-Precision FP Values to Packed Dword Integers
CVTTSD2SIConvert with Truncation Scalar Double-Precision Floating-Point Value to Signed Integer
CVTTSS2SIConvert with Truncation Scalar Single-Precision Floating-Point Value to Integer
CWDConvert Word to Doubleword/Convert Doubleword to Quadword
CWDEConvert Byte to Word/Convert Word to Doubleword/Convert Doubleword to Quadword
DAADecimal Adjust AL after Addition
DASDecimal Adjust AL after Subtraction
DECDecrement by 1
DIVUnsigned Divide
DIVPDDivide Packed Double-Precision Floating-Point Values
DIVPSDivide Packed Single-Precision Floating-Point Values
DIVSDDivide Scalar Double-Precision Floating-Point Value
DIVSSDivide Scalar Single-Precision Floating-Point Values
DPPDDot Product of Packed Double Precision Floating-Point Values
DPPSDot Product of Packed Single Precision Floating-Point Values
EMMSEmpty MMX Technology State
ENTERMake Stack Frame for Procedure Parameters
EXTRACTPSExtract Packed Floating-Point Values
F2XM1Compute 2x–1
FABSAbsolute Value
FADDAdd
FADDPAdd
FBLDLoad Binary Coded Decimal
FBSTPStore BCD Integer and Pop
FCHSChange Sign
FCLEXClear Exceptions
FCMOVccFloating-Point Conditional Move
FCOMCompare Floating Point Values
FCOMICompare Floating Point Values and Set EFLAGS
FCOMIPCompare Floating Point Values and Set EFLAGS
FCOMPCompare Floating Point Values
FCOMPPCompare Floating Point Values
FCOSCosine
FDECSTPDecrement Stack-Top Pointer
FDIVDivide
FDIVPDivide
FDIVRReverse Divide
FDIVRPReverse Divide
FFREEFree Floating-Point Register
FIADDAdd
FICOMCompare Integer
FICOMPCompare Integer
FIDIVDivide
FIDIVRReverse Divide
FILDLoad Integer
FIMULMultiply
FINCSTPIncrement Stack-Top Pointer
FINITInitialize Floating-Point Unit
FISTStore Integer
FISTPStore Integer
FISTTPStore Integer with Truncation
FISUBSubtract
FISUBRReverse Subtract
FLDLoad Floating Point Value
FLD1Load Constant
FLDCWLoad x87 FPU Control Word
FLDENVLoad x87 FPU Environment
FLDL2ELoad Constant
FLDL2TLoad Constant
FLDLG2Load Constant
FLDLN2Load Constant
FLDPILoad Constant
FLDZLoad Constant
FMULMultiply
FMULPMultiply
FNCLEXClear Exceptions
FNINITInitialize Floating-Point Unit
FNOPNo Operation
FNSAVEStore x87 FPU State
FNSTCWStore x87 FPU Control Word
FNSTENVStore x87 FPU Environment
FNSTSWStore x87 FPU Status Word
FPATANPartial Arctangent
FPREMPartial Remainder
FPREM1Partial Remainder
FPTANPartial Tangent
FRNDINTRound to Integer
FRSTORRestore x87 FPU State
FSAVEStore x87 FPU State
FSCALEScale
FSINSine
FSINCOSSine and Cosine
FSQRTSquare Root
FSTStore Floating Point Value
FSTCWStore x87 FPU Control Word
FSTENVStore x87 FPU Environment
FSTPStore Floating Point Value
FSTSWStore x87 FPU Status Word
FSUBSubtract
FSUBPSubtract
FSUBRReverse Subtract
FSUBRPReverse Subtract
FTSTTEST
FUCOMUnordered Compare Floating Point Values
FUCOMICompare Floating Point Values and Set EFLAGS
FUCOMIPCompare Floating Point Values and Set EFLAGS
FUCOMPUnordered Compare Floating Point Values
FUCOMPPUnordered Compare Floating Point Values
FWAITWait
FXAMExamine Floating-Point
FXCHExchange Register Contents
FXRSTORRestore x87 FPU, MMX, XMM, and MXCSR State
FXSAVESave x87 FPU, MMX Technology, and SSE State
FXTRACTExtract Exponent and Significand
FYL2XCompute y ∗ log2x
FYL2XP1Compute y ∗ log2(x +1)
GF2P8AFFINEINVQBGalois Field Affine Transformation Inverse
GF2P8AFFINEQBGalois Field Affine Transformation
GF2P8MULBGalois Field Multiply Bytes
HADDPDPacked Double-FP Horizontal Add
HADDPSPacked Single-FP Horizontal Add
HLTHalt
HSUBPDPacked Double-FP Horizontal Subtract
HSUBPSPacked Single-FP Horizontal Subtract
IDIVSigned Divide
IMULSigned Multiply
INInput from Port
INCIncrement by 1
INSInput from Port to String
INSBInput from Port to String
INSDInput from Port to String
INSERTPSInsert Scalar Single-Precision Floating-Point Value
INSWInput from Port to String
INT nCall to Interrupt Procedure
INT1Call to Interrupt Procedure
INT3Call to Interrupt Procedure
INTOCall to Interrupt Procedure
INVDInvalidate Internal Caches
INVLPGInvalidate TLB Entries
INVPCIDInvalidate Process-Context Identifier
IRETInterrupt Return
IRETDInterrupt Return
JMPJump
JccJump if Condition Is Met
KADDBADD Two Masks
KADDDADD Two Masks
KADDQADD Two Masks
KADDWADD Two Masks
KANDBBitwise Logical AND Masks
KANDDBitwise Logical AND Masks
KANDNBBitwise Logical AND NOT Masks
KANDNDBitwise Logical AND NOT Masks
KANDNQBitwise Logical AND NOT Masks
KANDNWBitwise Logical AND NOT Masks
KANDQBitwise Logical AND Masks
KANDWBitwise Logical AND Masks
KMOVBMove from and to Mask Registers
KMOVDMove from and to Mask Registers
KMOVQMove from and to Mask Registers
KMOVWMove from and to Mask Registers
KNOTBNOT Mask Register
KNOTDNOT Mask Register
KNOTQNOT Mask Register
KNOTWNOT Mask Register
KORBBitwise Logical OR Masks
KORDBitwise Logical OR Masks
KORQBitwise Logical OR Masks
KORTESTBOR Masks And Set Flags
KORTESTDOR Masks And Set Flags
KORTESTQOR Masks And Set Flags
KORTESTWOR Masks And Set Flags
KORWBitwise Logical OR Masks
KSHIFTLBShift Left Mask Registers
KSHIFTLDShift Left Mask Registers
KSHIFTLQShift Left Mask Registers
KSHIFTLWShift Left Mask Registers
KSHIFTRBShift Right Mask Registers
KSHIFTRDShift Right Mask Registers
KSHIFTRQShift Right Mask Registers
KSHIFTRWShift Right Mask Registers
KTESTBPacked Bit Test Masks and Set Flags
KTESTDPacked Bit Test Masks and Set Flags
KTESTQPacked Bit Test Masks and Set Flags
KTESTWPacked Bit Test Masks and Set Flags
KUNPCKBWUnpack for Mask Registers
KUNPCKDQUnpack for Mask Registers
KUNPCKWDUnpack for Mask Registers
KXNORBBitwise Logical XNOR Masks
KXNORDBitwise Logical XNOR Masks
KXNORQBitwise Logical XNOR Masks
KXNORWBitwise Logical XNOR Masks
KXORBBitwise Logical XOR Masks
KXORDBitwise Logical XOR Masks
KXORQBitwise Logical XOR Masks
KXORWBitwise Logical XOR Masks
LAHFLoad Status Flags into AH Register
LARLoad Access Rights Byte
LDDQULoad Unaligned Integer 128 Bits
LDMXCSRLoad MXCSR Register
LDSLoad Far Pointer
LEALoad Effective Address
LEAVEHigh Level Procedure Exit
LESLoad Far Pointer
LFENCELoad Fence
LFSLoad Far Pointer
LGDTLoad Global/Interrupt Descriptor Table Register
LGSLoad Far Pointer
LIDTLoad Global/Interrupt Descriptor Table Register
LLDTLoad Local Descriptor Table Register
LMSWLoad Machine Status Word
LOCKAssert LOCK# Signal Prefix
LODSLoad String
LODSBLoad String
LODSDLoad String
LODSQLoad String
LODSWLoad String
LOOPLoop According to ECX Counter
LOOPccLoop According to ECX Counter
LSLLoad Segment Limit
LSSLoad Far Pointer
LTRLoad Task Register
LZCNTCount the Number of Leading Zero Bits
MASKMOVDQUStore Selected Bytes of Double Quadword
MASKMOVQStore Selected Bytes of Quadword
MAXPDMaximum of Packed Double-Precision Floating-Point Values
MAXPSMaximum of Packed Single-Precision Floating-Point Values
MAXSDReturn Maximum Scalar Double-Precision Floating-Point Value
MAXSSReturn Maximum Scalar Single-Precision Floating-Point Value
MFENCEMemory Fence
MINPDMinimum of Packed Double-Precision Floating-Point Values
MINPSMinimum of Packed Single-Precision Floating-Point Values
MINSDReturn Minimum Scalar Double-Precision Floating-Point Value
MINSSReturn Minimum Scalar Single-Precision Floating-Point Value
MONITORSet Up Monitor Address
MOVMove
MOV (1)Move to/from Control Registers
MOV (2)Move to/from Debug Registers
MOVAPDMove Aligned Packed Double-Precision Floating-Point Values
MOVAPSMove Aligned Packed Single-Precision Floating-Point Values
MOVBEMove Data After Swapping Bytes
MOVDMove Doubleword/Move Quadword
MOVDDUPReplicate Double FP Values
MOVDIR64BMove 64 Bytes as Direct Store
MOVDIRIMove Doubleword as Direct Store
MOVDQ2QMove Quadword from XMM to MMX Technology Register
MOVDQAMove Aligned Packed Integer Values
MOVDQUMove Unaligned Packed Integer Values
MOVHLPSMove Packed Single-Precision Floating-Point Values High to Low
MOVHPDMove High Packed Double-Precision Floating-Point Value
MOVHPSMove High Packed Single-Precision Floating-Point Values
MOVLHPSMove Packed Single-Precision Floating-Point Values Low to High
MOVLPDMove Low Packed Double-Precision Floating-Point Value
MOVLPSMove Low Packed Single-Precision Floating-Point Values
MOVMSKPDExtract Packed Double-Precision Floating-Point Sign Mask
MOVMSKPSExtract Packed Single-Precision Floating-Point Sign Mask
MOVNTDQStore Packed Integers Using Non-Temporal Hint
MOVNTDQALoad Double Quadword Non-Temporal Aligned Hint
MOVNTIStore Doubleword Using Non-Temporal Hint
MOVNTPDStore Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
MOVNTPSStore Packed Single-Precision Floating-Point Values Using Non-Temporal Hint
MOVNTQStore of Quadword Using Non-Temporal Hint
MOVQMove Doubleword/Move Quadword
MOVQ (1)Move Quadword
MOVQ2DQMove Quadword from MMX Technology to XMM Register
MOVSMove Data from String to String
MOVSBMove Data from String to String
MOVSDMove Data from String to String
MOVSD (1)Move or Merge Scalar Double-Precision Floating-Point Value
MOVSHDUPReplicate Single FP Values
MOVSLDUPReplicate Single FP Values
MOVSQMove Data from String to String
MOVSSMove or Merge Scalar Single-Precision Floating-Point Value
MOVSWMove Data from String to String
MOVSXMove with Sign-Extension
MOVSXDMove with Sign-Extension
MOVUPDMove Unaligned Packed Double-Precision Floating-Point Values
MOVUPSMove Unaligned Packed Single-Precision Floating-Point Values
MOVZXMove with Zero-Extend
MPSADBWCompute Multiple Packed Sums of Absolute Difference
MULUnsigned Multiply
MULPDMultiply Packed Double-Precision Floating-Point Values
MULPSMultiply Packed Single-Precision Floating-Point Values
MULSDMultiply Scalar Double-Precision Floating-Point Value
MULSSMultiply Scalar Single-Precision Floating-Point Values
MULXUnsigned Multiply Without Affecting Flags
MWAITMonitor Wait
NEGTwo's Complement Negation
NOPNo Operation
NOTOne's Complement Negation
ORLogical Inclusive OR
ORPDBitwise Logical OR of Packed Double Precision Floating-Point Values
ORPSBitwise Logical OR of Packed Single Precision Floating-Point Values
OUTOutput to Port
OUTSOutput String to Port
OUTSBOutput String to Port
OUTSDOutput String to Port
OUTSWOutput String to Port
PABSBPacked Absolute Value
PABSDPacked Absolute Value
PABSQPacked Absolute Value
PABSWPacked Absolute Value
PACKSSDWPack with Signed Saturation
PACKSSWBPack with Signed Saturation
PACKUSDWPack with Unsigned Saturation
PACKUSWBPack with Unsigned Saturation
PADDBAdd Packed Integers
PADDDAdd Packed Integers
PADDQAdd Packed Integers
PADDSBAdd Packed Signed Integers with Signed Saturation
PADDSWAdd Packed Signed Integers with Signed Saturation
PADDUSBAdd Packed Unsigned Integers with Unsigned Saturation
PADDUSWAdd Packed Unsigned Integers with Unsigned Saturation
PADDWAdd Packed Integers
PALIGNRPacked Align Right
PANDLogical AND
PANDNLogical AND NOT
PAUSESpin Loop Hint
PAVGBAverage Packed Integers
PAVGWAverage Packed Integers
PBLENDVBVariable Blend Packed Bytes
PBLENDWBlend Packed Words
PCLMULQDQCarry-Less Multiplication Quadword
PCMPEQBCompare Packed Data for Equal
PCMPEQDCompare Packed Data for Equal
PCMPEQQCompare Packed Qword Data for Equal
PCMPEQWCompare Packed Data for Equal
PCMPESTRIPacked Compare Explicit Length Strings, Return Index
PCMPESTRMPacked Compare Explicit Length Strings, Return Mask
PCMPGTBCompare Packed Signed Integers for Greater Than
PCMPGTDCompare Packed Signed Integers for Greater Than
PCMPGTQCompare Packed Data for Greater Than
PCMPGTWCompare Packed Signed Integers for Greater Than
PCMPISTRIPacked Compare Implicit Length Strings, Return Index
PCMPISTRMPacked Compare Implicit Length Strings, Return Mask
PDEPParallel Bits Deposit
PEXTParallel Bits Extract
PEXTRBExtract Byte/Dword/Qword
PEXTRDExtract Byte/Dword/Qword
PEXTRQExtract Byte/Dword/Qword
PEXTRWExtract Word
PHADDDPacked Horizontal Add
PHADDSWPacked Horizontal Add and Saturate
PHADDWPacked Horizontal Add
PHMINPOSUWPacked Horizontal Word Minimum
PHSUBDPacked Horizontal Subtract
PHSUBSWPacked Horizontal Subtract and Saturate
PHSUBWPacked Horizontal Subtract
PINSRBInsert Byte/Dword/Qword
PINSRDInsert Byte/Dword/Qword
PINSRQInsert Byte/Dword/Qword
PINSRWInsert Word
PMADDUBSWMultiply and Add Packed Signed and Unsigned Bytes
PMADDWDMultiply and Add Packed Integers
PMAXSBMaximum of Packed Signed Integers
PMAXSDMaximum of Packed Signed Integers
PMAXSQMaximum of Packed Signed Integers
PMAXSWMaximum of Packed Signed Integers
PMAXUBMaximum of Packed Unsigned Integers
PMAXUDMaximum of Packed Unsigned Integers
PMAXUQMaximum of Packed Unsigned Integers
PMAXUWMaximum of Packed Unsigned Integers
PMINSBMinimum of Packed Signed Integers
PMINSDMinimum of Packed Signed Integers
PMINSQMinimum of Packed Signed Integers
PMINSWMinimum of Packed Signed Integers
PMINUBMinimum of Packed Unsigned Integers
PMINUDMinimum of Packed Unsigned Integers
PMINUQMinimum of Packed Unsigned Integers
PMINUWMinimum of Packed Unsigned Integers
PMOVMSKBMove Byte Mask
PMOVSXPacked Move with Sign Extend
PMOVZXPacked Move with Zero Extend
PMULDQMultiply Packed Doubleword Integers
PMULHRSWPacked Multiply High with Round and Scale
PMULHUWMultiply Packed Unsigned Integers and Store High Result
PMULHWMultiply Packed Signed Integers and Store High Result
PMULLDMultiply Packed Integers and Store Low Result
PMULLQMultiply Packed Integers and Store Low Result
PMULLWMultiply Packed Signed Integers and Store Low Result
PMULUDQMultiply Packed Unsigned Doubleword Integers
POPPop a Value from the Stack
POPAPop All General-Purpose Registers
POPADPop All General-Purpose Registers
POPCNTReturn the Count of Number of Bits Set to 1
POPFPop Stack into EFLAGS Register
POPFDPop Stack into EFLAGS Register
POPFQPop Stack into EFLAGS Register
PORBitwise Logical OR
PREFETCHWPrefetch Data into Caches in Anticipation of a Write
PREFETCHhPrefetch Data Into Caches
PSADBWCompute Sum of Absolute Differences
PSHUFBPacked Shuffle Bytes
PSHUFDShuffle Packed Doublewords
PSHUFHWShuffle Packed High Words
PSHUFLWShuffle Packed Low Words
PSHUFWShuffle Packed Words
PSIGNBPacked SIGN
PSIGNDPacked SIGN
PSIGNWPacked SIGN
PSLLDShift Packed Data Left Logical
PSLLDQShift Double Quadword Left Logical
PSLLQShift Packed Data Left Logical
PSLLWShift Packed Data Left Logical
PSRADShift Packed Data Right Arithmetic
PSRAQShift Packed Data Right Arithmetic
PSRAWShift Packed Data Right Arithmetic
PSRLDShift Packed Data Right Logical
PSRLDQShift Double Quadword Right Logical
PSRLQShift Packed Data Right Logical
PSRLWShift Packed Data Right Logical
PSUBBSubtract Packed Integers
PSUBDSubtract Packed Integers
PSUBQSubtract Packed Quadword Integers
PSUBSBSubtract Packed Signed Integers with Signed Saturation
PSUBSWSubtract Packed Signed Integers with Signed Saturation
PSUBUSBSubtract Packed Unsigned Integers with Unsigned Saturation
PSUBUSWSubtract Packed Unsigned Integers with Unsigned Saturation
PSUBWSubtract Packed Integers
PTESTLogical Compare
PTWRITEWrite Data to a Processor Trace Packet
PUNPCKHBWUnpack High Data
PUNPCKHDQUnpack High Data
PUNPCKHQDQUnpack High Data
PUNPCKHWDUnpack High Data
PUNPCKLBWUnpack Low Data
PUNPCKLDQUnpack Low Data
PUNPCKLQDQUnpack Low Data
PUNPCKLWDUnpack Low Data
PUSHPush Word, Doubleword or Quadword Onto the Stack
PUSHAPush All General-Purpose Registers
PUSHADPush All General-Purpose Registers
PUSHFPush EFLAGS Register onto the Stack
PUSHFDPush EFLAGS Register onto the Stack
PUSHFQPush EFLAGS Register onto the Stack
PXORLogical Exclusive OR
RCLRotate
RCPPSCompute Reciprocals of Packed Single-Precision Floating-Point Values
RCPSSCompute Reciprocal of Scalar Single-Precision Floating-Point Values
RCRRotate
RDFSBASERead FS/GS Segment Base
RDGSBASERead FS/GS Segment Base
RDMSRRead from Model Specific Register
RDPIDRead Processor ID
RDPKRURead Protection Key Rights for User Pages
RDPMCRead Performance-Monitoring Counters
RDRANDRead Random Number
RDSEEDRead Random SEED
RDTSCRead Time-Stamp Counter
RDTSCPRead Time-Stamp Counter and Processor ID
REPRepeat String Operation Prefix
REPERepeat String Operation Prefix
REPNERepeat String Operation Prefix
REPNZRepeat String Operation Prefix
REPZRepeat String Operation Prefix
RETReturn from Procedure
ROLRotate
RORRotate
RORXRotate Right Logical Without Affecting Flags
ROUNDPDRound Packed Double Precision Floating-Point Values
ROUNDPSRound Packed Single Precision Floating-Point Values
ROUNDSDRound Scalar Double Precision Floating-Point Values
ROUNDSSRound Scalar Single Precision Floating-Point Values
RSMResume from System Management Mode
RSQRTPSCompute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values
RSQRTSSCompute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value
SAHFStore AH into Flags
SALShift
SARShift
SARXShift Without Affecting Flags
SBBInteger Subtraction with Borrow
SCASScan String
SCASBScan String
SCASDScan String
SCASWScan String
SETccSet Byte on Condition
SFENCEStore Fence
SGDTStore Global Descriptor Table Register
SHA1MSG1Perform an Intermediate Calculation for the Next Four SHA1 Message Dwords
SHA1MSG2Perform a Final Calculation for the Next Four SHA1 Message Dwords
SHA1NEXTECalculate SHA1 State Variable E after Four Rounds
SHA1RNDS4Perform Four Rounds of SHA1 Operation
SHA256MSG1Perform an Intermediate Calculation for the Next Four SHA256 Message Dwords
SHA256MSG2Perform a Final Calculation for the Next Four SHA256 Message Dwords
SHA256RNDS2Perform Two Rounds of SHA256 Operation
SHLShift
SHLDDouble Precision Shift Left
SHLXShift Without Affecting Flags
SHRShift
SHRDDouble Precision Shift Right
SHRXShift Without Affecting Flags
SHUFPDPacked Interleave Shuffle of Pairs of Double-Precision Floating-Point Values
SHUFPSPacked Interleave Shuffle of Quadruplets of Single-Precision Floating-Point Values
SIDTStore Interrupt Descriptor Table Register
SLDTStore Local Descriptor Table Register
SMSWStore Machine Status Word
SQRTPDSquare Root of Double-Precision Floating-Point Values
SQRTPSSquare Root of Single-Precision Floating-Point Values
SQRTSDCompute Square Root of Scalar Double-Precision Floating-Point Value
SQRTSSCompute Square Root of Scalar Single-Precision Value
STACSet AC Flag in EFLAGS Register
STCSet Carry Flag
STDSet Direction Flag
STISet Interrupt Flag
STMXCSRStore MXCSR Register State
STOSStore String
STOSBStore String
STOSDStore String
STOSQStore String
STOSWStore String
STRStore Task Register
SUBSubtract
SUBPDSubtract Packed Double-Precision Floating-Point Values
SUBPSSubtract Packed Single-Precision Floating-Point Values
SUBSDSubtract Scalar Double-Precision Floating-Point Value
SUBSSSubtract Scalar Single-Precision Floating-Point Value
SWAPGSSwap GS Base Register
SYSCALLFast System Call
SYSENTERFast System Call
SYSEXITFast Return from Fast System Call
SYSRETReturn From Fast System Call
TESTLogical Compare
TPAUSETimed PAUSE
TZCNTCount the Number of Trailing Zero Bits
UCOMISDUnordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS
UCOMISSUnordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS
UDUndefined Instruction
UMONITORUser Level Set Up Monitor Address
UMWAITUser Level Monitor Wait
UNPCKHPDUnpack and Interleave High Packed Double-Precision Floating-Point Values
UNPCKHPSUnpack and Interleave High Packed Single-Precision Floating-Point Values
UNPCKLPDUnpack and Interleave Low Packed Double-Precision Floating-Point Values
UNPCKLPSUnpack and Interleave Low Packed Single-Precision Floating-Point Values
VALIGNDAlign Doubleword/Quadword Vectors
VALIGNQAlign Doubleword/Quadword Vectors
VBLENDMPDBlend Float64/Float32 Vectors Using an OpMask Control
VBLENDMPSBlend Float64/Float32 Vectors Using an OpMask Control
VBROADCASTLoad with Broadcast Floating-Point Data
VCOMPRESSPDStore Sparse Packed Double-Precision Floating-Point Values into Dense Memory
VCOMPRESSPSStore Sparse Packed Single-Precision Floating-Point Values into Dense Memory
VCVTPD2QQConvert Packed Double-Precision Floating-Point Values to Packed Quadword Integers
VCVTPD2UDQConvert Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers
VCVTPD2UQQConvert Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers
VCVTPH2PSConvert 16-bit FP values to Single-Precision FP values
VCVTPS2PHConvert Single-Precision FP value to 16-bit FP value
VCVTPS2QQConvert Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values
VCVTPS2UDQConvert Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values
VCVTPS2UQQConvert Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values
VCVTQQ2PDConvert Packed Quadword Integers to Packed Double-Precision Floating-Point Values
VCVTQQ2PSConvert Packed Quadword Integers to Packed Single-Precision Floating-Point Values
VCVTSD2USIConvert Scalar Double-Precision Floating-Point Value to Unsigned Doubleword Integer
VCVTSS2USIConvert Scalar Single-Precision Floating-Point Value to Unsigned Doubleword Integer
VCVTTPD2QQConvert with Truncation Packed Double-Precision Floating-Point Values to Packed Quadword Integers
VCVTTPD2UDQConvert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Doubleword Integers
VCVTTPD2UQQConvert with Truncation Packed Double-Precision Floating-Point Values to Packed Unsigned Quadword Integers
VCVTTPS2QQConvert with Truncation Packed Single Precision Floating-Point Values to Packed Singed Quadword Integer Values
VCVTTPS2UDQConvert with Truncation Packed Single-Precision Floating-Point Values to Packed Unsigned Doubleword Integer Values
VCVTTPS2UQQConvert with Truncation Packed Single Precision Floating-Point Values to Packed Unsigned Quadword Integer Values
VCVTTSD2USIConvert with Truncation Scalar Double-Precision Floating-Point Value to Unsigned Integer
VCVTTSS2USIConvert with Truncation Scalar Single-Precision Floating-Point Value to Unsigned Integer
VCVTUDQ2PDConvert Packed Unsigned Doubleword Integers to Packed Double-Precision Floating-Point Values
VCVTUDQ2PSConvert Packed Unsigned Doubleword Integers to Packed Single-Precision Floating-Point Values
VCVTUQQ2PDConvert Packed Unsigned Quadword Integers to Packed Double-Precision Floating-Point Values
VCVTUQQ2PSConvert Packed Unsigned Quadword Integers to Packed Single-Precision Floating-Point Values
VCVTUSI2SDConvert Unsigned Integer to Scalar Double-Precision Floating-Point Value
VCVTUSI2SSConvert Unsigned Integer to Scalar Single-Precision Floating-Point Value
VDBPSADBWDouble Block Packed Sum-Absolute-Differences (SAD) on Unsigned Bytes
VERRVerify a Segment for Reading or Writing
VERWVerify a Segment for Reading or Writing
VEXPANDPDLoad Sparse Packed Double-Precision Floating-Point Values from Dense Memory
VEXPANDPSLoad Sparse Packed Single-Precision Floating-Point Values from Dense Memory
VEXTRACTF128Extra ct Packed Floating-Point Values
VEXTRACTF32x4Extra ct Packed Floating-Point Values
VEXTRACTF32x8Extra ct Packed Floating-Point Values
VEXTRACTF64x2Extra ct Packed Floating-Point Values
VEXTRACTF64x4Extra ct Packed Floating-Point Values
VEXTRACTI128Extract packed Integer Values
VEXTRACTI32x4Extract packed Integer Values
VEXTRACTI32x8Extract packed Integer Values
VEXTRACTI64x2Extract packed Integer Values
VEXTRACTI64x4Extract packed Integer Values
VFIXUPIMMPDFix Up Special Packed Float64 Values
VFIXUPIMMPSFix Up Special Packed Float32 Values
VFIXUPIMMSDFix Up Special Scalar Float64 Value
VFIXUPIMMSSFix Up Special Scalar Float32 Value
VFMADD132PDFused Multiply-Add of Packed Double- Precision Floating-Point Values
VFMADD132PSFused Multiply-Add of Packed Single- Precision Floating-Point Values
VFMADD132SDFused Multiply-Add of Scalar Double- Precision Floating-Point Values
VFMADD132SSFused Multiply-Add of Scalar Single-Precision Floating-Point Values
VFMADD213PDFused Multiply-Add of Packed Double- Precision Floating-Point Values
VFMADD213PSFused Multiply-Add of Packed Single- Precision Floating-Point Values
VFMADD213SDFused Multiply-Add of Scalar Double- Precision Floating-Point Values
VFMADD213SSFused Multiply-Add of Scalar Single-Precision Floating-Point Values
VFMADD231PDFused Multiply-Add of Packed Double- Precision Floating-Point Values
VFMADD231PSFused Multiply-Add of Packed Single- Precision Floating-Point Values
VFMADD231SDFused Multiply-Add of Scalar Double- Precision Floating-Point Values
VFMADD231SSFused Multiply-Add of Scalar Single-Precision Floating-Point Values
VFMADDSUB132PDFused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
VFMADDSUB132PSFused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
VFMADDSUB213PDFused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
VFMADDSUB213PSFused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
VFMADDSUB231PDFused Multiply-Alternating Add/Subtract of Packed Double-Precision Floating-Point Values
VFMADDSUB231PSFused Multiply-Alternating Add/Subtract of Packed Single-Precision Floating-Point Values
VFMSUB132PDFused Multiply-Subtract of Packed Double- Precision Floating-Point Values
VFMSUB132PSFused Multiply-Subtract of Packed Single- Precision Floating-Point Values
VFMSUB132SDFused Multiply-Subtract of Scalar Double- Precision Floating-Point Values
VFMSUB132SSFused Multiply-Subtract of Scalar Single- Precision Floating-Point Values
VFMSUB213PDFused Multiply-Subtract of Packed Double- Precision Floating-Point Values
VFMSUB213PSFused Multiply-Subtract of Packed Single- Precision Floating-Point Values
VFMSUB213SDFused Multiply-Subtract of Scalar Double- Precision Floating-Point Values
VFMSUB213SSFused Multiply-Subtract of Scalar Single- Precision Floating-Point Values
VFMSUB231PDFused Multiply-Subtract of Packed Double- Precision Floating-Point Values
VFMSUB231PSFused Multiply-Subtract of Packed Single- Precision Floating-Point Values
VFMSUB231SDFused Multiply-Subtract of Scalar Double- Precision Floating-Point Values
VFMSUB231SSFused Multiply-Subtract of Scalar Single- Precision Floating-Point Values
VFMSUBADD132PDFused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
VFMSUBADD132PSFused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
VFMSUBADD213PDFused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
VFMSUBADD213PSFused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
VFMSUBADD231PDFused Multiply-Alternating Subtract/Add of Packed Double-Precision Floating-Point Values
VFMSUBADD231PSFused Multiply-Alternating Subtract/Add of Packed Single-Precision Floating-Point Values
VFNMADD132PDFused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
VFNMADD132PSFused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
VFNMADD132SDFused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
VFNMADD132SSFused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
VFNMADD213PDFused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
VFNMADD213PSFused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
VFNMADD213SDFused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
VFNMADD213SSFused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
VFNMADD231PDFused Negative Multiply-Add of Packed Double-Precision Floating-Point Values
VFNMADD231PSFused Negative Multiply-Add of Packed Single-Precision Floating-Point Values
VFNMADD231SDFused Negative Multiply-Add of Scalar Double-Precision Floating-Point Values
VFNMADD231SSFused Negative Multiply-Add of Scalar Single-Precision Floating-Point Values
VFNMSUB132PDFused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
VFNMSUB132PSFused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
VFNMSUB132SDFused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
VFNMSUB132SSFused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
VFNMSUB213PDFused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
VFNMSUB213PSFused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
VFNMSUB213SDFused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
VFNMSUB213SSFused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
VFNMSUB231PDFused Negative Multiply-Subtract of Packed Double-Precision Floating-Point Values
VFNMSUB231PSFused Negative Multiply-Subtract of Packed Single-Precision Floating-Point Values
VFNMSUB231SDFused Negative Multiply-Subtract of Scalar Double-Precision Floating-Point Values
VFNMSUB231SSFused Negative Multiply-Subtract of Scalar Single-Precision Floating-Point Values
VFPCLASSPDTests Types Of a Packed Float64 Values
VFPCLASSPSTests Types Of a Packed Float32 Values
VFPCLASSSDTests Types Of a Scalar Float64 Values
VFPCLASSSSTests Types Of a Scalar Float32 Values
VGATHERDPDGather Packed DP FP Values Using Signed Dword/Qword Indices
VGATHERDPD (1)Gather Packed Single, Packed Double with Signed Dword
VGATHERDPSGather Packed SP FP values Using Signed Dword/Qword Indices
VGATHERDPS (1)Gather Packed Single, Packed Double with Signed Dword
VGATHERQPDGather Packed DP FP Values Using Signed Dword/Qword Indices
VGATHERQPD (1)Gather Packed Single, Packed Double with Signed Qword Indices
VGATHERQPSGather Packed SP FP values Using Signed Dword/Qword Indices
VGATHERQPS (1)Gather Packed Single, Packed Double with Signed Qword Indices
VGETEXPPDConvert Exponents of Packed DP FP Values to DP FP Values
VGETEXPPSConvert Exponents of Packed SP FP Values to SP FP Values
VGETEXPSDConvert Exponents of Scalar DP FP Values to DP FP Value
VGETEXPSSConvert Exponents of Scalar SP FP Values to SP FP Value
VGETMANTPDExtract Float64 Vector of Normalized Mantissas from Float64 Vector
VGETMANTPSExtract Float32 Vector of Normalized Mantissas from Float32 Vector
VGETMANTSDExtract Float64 of Normalized Mantissas from Float64 Scalar
VGETMANTSSExtract Float32 Vector of Normalized Mantissa from Float32 Vector
VINSERTF128Insert Packed Floating-Point Values
VINSERTF32x4Insert Packed Floating-Point Values
VINSERTF32x8Insert Packed Floating-Point Values
VINSERTF64x2Insert Packed Floating-Point Values
VINSERTF64x4Insert Packed Floating-Point Values
VINSERTI128Insert Packed Integer Values
VINSERTI32x4Insert Packed Integer Values
VINSERTI32x8Insert Packed Integer Values
VINSERTI64x2Insert Packed Integer Values
VINSERTI64x4Insert Packed Integer Values
VMASKMOVConditional SIMD Packed Loads and Stores
VMOVDQA32Move Aligned Packed Integer Values
VMOVDQA64Move Aligned Packed Integer Values
VMOVDQU16Move Unaligned Packed Integer Values
VMOVDQU32Move Unaligned Packed Integer Values
VMOVDQU64Move Unaligned Packed Integer Values
VMOVDQU8Move Unaligned Packed Integer Values
VPBLENDDBlend Packed Dwords
VPBLENDMBBlend Byte/Word Vectors Using an Opmask Control
VPBLENDMDBlend Int32/Int64 Vectors Using an OpMask Control
VPBLENDMQBlend Int32/Int64 Vectors Using an OpMask Control
VPBLENDMWBlend Byte/Word Vectors Using an Opmask Control
VPBROADCASTLoad Integer and Broadcast
VPBROADCASTBLoad with Broadcast Integer Data from General Purpose Register
VPBROADCASTDLoad with Broadcast Integer Data from General Purpose Register
VPBROADCASTMBroadcast Mask to Vector Register
VPBROADCASTQLoad with Broadcast Integer Data from General Purpose Register
VPBROADCASTWLoad with Broadcast Integer Data from General Purpose Register
VPCMPBCompare Packed Byte Values Into Mask
VPCMPDCompare Packed Integer Values into Mask
VPCMPQCompare Packed Integer Values into Mask
VPCMPUBCompare Packed Byte Values Into Mask
VPCMPUDCompare Packed Integer Values into Mask
VPCMPUQCompare Packed Integer Values into Mask
VPCMPUWCompare Packed Word Values Into Mask
VPCMPWCompare Packed Word Values Into Mask
VPCOMPRESSDStore Sparse Packed Doubleword Integer Values into Dense Memory/Register
VPCOMPRESSQStore Sparse Packed Quadword Integer Values into Dense Memory/Register
VPCONFLICTDDetect Conflicts Within a Vector of Packed Dword/Qword Values into Dense Memory/ Register
VPCONFLICTQDetect Conflicts Within a Vector of Packed Dword/Qword Values into Dense Memory/ Register
VPERM2F128Permute Floating-Point Values
VPERM2I128Permute Integer Values
VPERMBPermute Packed Bytes Elements
VPERMDPermute Packed Doublewords/Words Elements
VPERMI2BFull Permute of Bytes from Two Tables Overwriting the Index
VPERMI2DFull Permute From Two Tables Overwriting the Index
VPERMI2PDFull Permute From Two Tables Overwriting the Index
VPERMI2PSFull Permute From Two Tables Overwriting the Index
VPERMI2QFull Permute From Two Tables Overwriting the Index
VPERMI2WFull Permute From Two Tables Overwriting the Index
VPERMILPDPermute In-Lane of Pairs of Double-Precision Floating-Point Values
VPERMILPSPermute In-Lane of Quadruples of Single-Precision Floating-Point Values
VPERMPDPermute Double-Precision Floating-Point Elements
VPERMPSPermute Single-Precision Floating-Point Elements
VPERMQQwords Element Permutation
VPERMT2BFull Permute of Bytes from Two Tables Overwriting a Table
VPERMT2DFull Permute from Two Tables Overwriting one Table
VPERMT2PDFull Permute from Two Tables Overwriting one Table
VPERMT2PSFull Permute from Two Tables Overwriting one Table
VPERMT2QFull Permute from Two Tables Overwriting one Table
VPERMT2WFull Permute from Two Tables Overwriting one Table
VPERMWPermute Packed Doublewords/Words Elements
VPEXPANDDLoad Sparse Packed Doubleword Integer Values from Dense Memory / Register
VPEXPANDQLoad Sparse Packed Quadword Integer Values from Dense Memory / Register
VPGATHERDDGather Packed Dword Values Using Signed Dword/Qword Indices
VPGATHERDD (1)Gather Packed Dword, Packed Qword with Signed Dword Indices
VPGATHERDQGather Packed Dword, Packed Qword with Signed Dword Indices
VPGATHERDQ (1)Gather Packed Qword Values Using Signed Dword/Qword Indices
VPGATHERQDGather Packed Dword Values Using Signed Dword/Qword Indices
VPGATHERQD (1)Gather Packed Dword, Packed Qword with Signed Qword Indices
VPGATHERQQGather Packed Qword Values Using Signed Dword/Qword Indices
VPGATHERQQ (1)Gather Packed Dword, Packed Qword with Signed Qword Indices
VPLZCNTDCount the Number of Leading Zero Bits for Packed Dword, Packed Qword Values
VPLZCNTQCount the Number of Leading Zero Bits for Packed Dword, Packed Qword Values
VPMADD52HUQPacked Multiply of Unsigned 52-bit Unsigned Integers and Add High 52-bit Products to 64-bit Accumulators
VPMADD52LUQPacked Multiply of Unsigned 52-bit Integers and Add the Low 52-bit Products to Qword Accumulators
VPMASKMOVConditional SIMD Integer Packed Loads and Stores
VPMOVB2MConvert a Vector Register to a Mask
VPMOVD2MConvert a Vector Register to a Mask
VPMOVDBDown Convert DWord to Byte
VPMOVDWDown Convert DWord to Word
VPMOVM2BConvert a Mask Register to a Vector Register
VPMOVM2DConvert a Mask Register to a Vector Register
VPMOVM2QConvert a Mask Register to a Vector Register
VPMOVM2WConvert a Mask Register to a Vector Register
VPMOVQ2MConvert a Vector Register to a Mask
VPMOVQBDown Convert QWord to Byte
VPMOVQDDown Convert QWord to DWord
VPMOVQWDown Convert QWord to Word
VPMOVSDBDown Convert DWord to Byte
VPMOVSDWDown Convert DWord to Word
VPMOVSQBDown Convert QWord to Byte
VPMOVSQDDown Convert QWord to DWord
VPMOVSQWDown Convert QWord to Word
VPMOVSWBDown Convert Word to Byte
VPMOVUSDBDown Convert DWord to Byte
VPMOVUSDWDown Convert DWord to Word
VPMOVUSQBDown Convert QWord to Byte
VPMOVUSQDDown Convert QWord to DWord
VPMOVUSQWDown Convert QWord to Word
VPMOVUSWBDown Convert Word to Byte
VPMOVW2MConvert a Vector Register to a Mask
VPMOVWBDown Convert Word to Byte
VPMULTISHIFTQBSelect Packed Unaligned Bytes from Quadword Sources
VPROLDBit Rotate Left
VPROLQBit Rotate Left
VPROLVDBit Rotate Left
VPROLVQBit Rotate Left
VPRORDBit Rotate Right
VPRORQBit Rotate Right
VPRORVDBit Rotate Right
VPRORVQBit Rotate Right
VPSCATTERDDScatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices
VPSCATTERDQScatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices
VPSCATTERQDScatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices
VPSCATTERQQScatter Packed Dword, Packed Qword with Signed Dword, Signed Qword Indices
VPSLLVDVariable Bit Shift Left Logical
VPSLLVQVariable Bit Shift Left Logical
VPSLLVWVariable Bit Shift Left Logical
VPSRAVDVariable Bit Shift Right Arithmetic
VPSRAVQVariable Bit Shift Right Arithmetic
VPSRAVWVariable Bit Shift Right Arithmetic
VPSRLVDVariable Bit Shift Right Logical
VPSRLVQVariable Bit Shift Right Logical
VPSRLVWVariable Bit Shift Right Logical
VPTERNLOGDBitwise Ternary Logic
VPTERNLOGQBitwise Ternary Logic
VPTESTMBLogical AND and Set Mask
VPTESTMDLogical AND and Set Mask
VPTESTMQLogical AND and Set Mask
VPTESTMWLogical AND and Set Mask
VPTESTNMBLogical NAND and Set
VPTESTNMDLogical NAND and Set
VPTESTNMQLogical NAND and Set
VPTESTNMWLogical NAND and Set
VRANGEPDRange Restriction Calculation For Packed Pairs of Float64 Values
VRANGEPSRange Restriction Calculation For Packed Pairs of Float32 Values
VRANGESDRange Restriction Calculation From a pair of Scalar Float64 Values
VRANGESSRange Restriction Calculation From a Pair of Scalar Float32 Values
VRCP14PDCompute Approximate Reciprocals of Packed Float64 Values
VRCP14PSCompute Approximate Reciprocals of Packed Float32 Values
VRCP14SDCompute Approximate Reciprocal of Scalar Float64 Value
VRCP14SSCompute Approximate Reciprocal of Scalar Float32 Value
VREDUCEPDPerform Reduction Transformation on Packed Float64 Values
VREDUCEPSPerform Reduction Transformation on Packed Float32 Values
VREDUCESDPerform a Reduction Transformation on a Scalar Float64 Value
VREDUCESSPerform a Reduction Transformation on a Scalar Float32 Value
VRNDSCALEPDRound Packed Float64 Values To Include A Given Number Of Fraction Bits
VRNDSCALEPSRound Packed Float32 Values To Include A Given Number Of Fraction Bits
VRNDSCALESDRound Scalar Float64 Value To Include A Given Number Of Fraction Bits
VRNDSCALESSRound Scalar Float32 Value To Include A Given Number Of Fraction Bits
VRSQRT14PDCompute Approximate Reciprocals of Square Roots of Packed Float64 Values
VRSQRT14PSCompute Approximate Reciprocals of Square Roots of Packed Float32 Values
VRSQRT14SDCompute Approximate Reciprocal of Square Root of Scalar Float64 Value
VRSQRT14SSCompute Approximate Reciprocal of Square Root of Scalar Float32 Value
VSCALEFPDScale Packed Float64 Values With Float64 Values
VSCALEFPSScale Packed Float32 Values With Float32 Values
VSCALEFSDScale Scalar Float64 Values With Float64 Values
VSCALEFSSScale Scalar Float32 Value With Float32 Value
VSCATTERDPDScatter Packed Single, Packed Double with Signed Dword and Qword Indices
VSCATTERDPSScatter Packed Single, Packed Double with Signed Dword and Qword Indices
VSCATTERQPDScatter Packed Single, Packed Double with Signed Dword and Qword Indices
VSCATTERQPSScatter Packed Single, Packed Double with Signed Dword and Qword Indices
VSHUFF32x4Shuffle Packed Values at 128-bit Granularity
VSHUFF64x2Shuffle Packed Values at 128-bit Granularity
VSHUFI32x4Shuffle Packed Values at 128-bit Granularity
VSHUFI64x2Shuffle Packed Values at 128-bit Granularity
VTESTPDPacked Bit Test
VTESTPSPacked Bit Test
VZEROALLZero All YMM Registers
VZEROUPPERZero Upper Bits of YMM Registers
WAITWait
WBINVDWrite Back and Invalidate Cache
WRFSBASEWrite FS/GS Segment Base
WRGSBASEWrite FS/GS Segment Base
WRMSRWrite to Model Specific Register
WRPKRUWrite Data to User Page Key Register
XABORTTransactional Abort
XACQUIREHardware Lock Elision Prefix Hints
XADDExchange and Add
XBEGINTransactional Begin
XCHGExchange Register/Memory with Register
XENDTransactional End
XGETBVGet Value of Extended Control Register
XLATTable Look-up Translation
XLATBTable Look-up Translation
XORLogical Exclusive OR
XORPDBitwise Logical XOR of Packed Double Precision Floating-Point Values
XORPSBitwise Logical XOR of Packed Single Precision Floating-Point Values
XRELEASEHardware Lock Elision Prefix Hints
XRSTORRestore Processor Extended States
XRSTORSRestore Processor Extended States Supervisor
XSAVESave Processor Extended States
XSAVECSave Processor Extended States with Compaction
XSAVEOPTSave Processor Extended States Optimized
XSAVESSave Processor Extended States Supervisor
XSETBVSet Extended Control Register
XTESTTest If In Transactional Execution

SGX Instructions

MnemonicSummary
ENCLSExecute an Enclave System Function of Specified Leaf Number
ENCLS[EADD]Add a Page to an Uninitialized Enclave
ENCLS[EAUG]Add a Page to an Initialized Enclave
ENCLS[EBLOCK]Mark a page in EPC as Blocked
ENCLS[ECREATE]Create an SECS page in the Enclave Page Cache
ENCLS[EDBGRD]Read From a Debug Enclave
ENCLS[EDBGWR]Write to a Debug Enclave
ENCLS[EEXTEND]Extend Uninitialized Enclave Measurement by 256 Bytes
ENCLS[EINIT]Initialize an Enclave for Execution
ENCLS[ELBUC]Load an EPC Page and Mark its State
ENCLS[ELDBC]Load an EPC Page and Mark its State
ENCLS[ELDB]Load an EPC Page and Mark its State
ENCLS[ELDU]Load an EPC Page and Mark its State
ENCLS[EMODPR]Restrict the Permissions of an EPC Page
ENCLS[EMODT]Change the Type of an EPC Page
ENCLS[EPA]Add Version Array
ENCLS[ERDINFO]Read Type and Status Information About an EPC Page
ENCLS[EREMOVE]Remove a page from the EPC
ENCLS[ETRACKC]Activates EBLOCK Checks
ENCLS[ETRACK]Activates EBLOCK Checks
ENCLS[EWB]Invalidate an EPC Page and Write out to Main Memory
ENCLUExecute an Enclave User Function of Specified Leaf Number
ENCLU[EACCEPTCOPY]Initialize a Pending Page
ENCLU[EACCEPT]Accept Changes to an EPC Page
ENCLU[EENTER]Enters an Enclave
ENCLU[EEXIT]Exits an Enclave
ENCLU[EGETKEY]Retrieves a Cryptographic Key
ENCLU[EMODPE]Extend an EPC Page Permissions
ENCLU[EREPORT]Create a Cryptographic Report of the Enclave
ENCLU[ERESUME]Re-Enters an Enclave
ENCLVExecute an Enclave VMM Function of Specified Leaf Number
ENCLV[EDECVIRTCHILD]Decrement VIRTCHILDCNT in SECS
ENCLV[EINCVIRTCHILD]Increment VIRTCHILDCNT in SECS
ENCLV[ESETCONTEXT]Set the ENCLAVECONTEXT Field in SECS

SMX Instructions

MnemonicSummary
GETSEC[CAPABILITIES]Report the SMX Capabilities
GETSEC[ENTERACCS]Execute Authenticated Chipset Code
GETSEC[EXITAC]Exit Authenticated Code Execution Mode
GETSEC[PARAMETERS]Report the SMX Parameters
GETSEC[SENTER]Enter a Measured Environment
GETSEC[SEXIT]Exit Measured Environment
GETSEC[SMCTRL]SMX Mode Control
GETSEC[WAKEUP]Wake up sleeping processors in measured environment

VMX Instructions

MnemonicSummary
INVEPTInvalidate Translations Derived from EPT
INVVPIDInvalidate Translations Based on VPID
VMCALLCall to VM Monitor
VMCLEARClear Virtual-Machine Control Structure
VMFUNCInvoke VM function
VMLAUNCHLaunch/Resume Virtual Machine
VMPTRLDLoad Pointer to Virtual-Machine Control Structure
VMPTRSTStore Pointer to Virtual-Machine Control Structure
VMREADRead Field from Virtual-Machine Control Structure
VMRESUMELaunch/Resume Virtual Machine
VMRESUME (1)Resume Virtual Machine
VMWRITEWrite Field to Virtual-Machine Control Structure
VMXOFFLeave VMX Operation
VMXONEnter VMX Operation

Xeon Phi™ Instructions

MnemonicSummary
PREFETCHWT1Prefetch Vector Data Into Caches with Intent to Write and T1 Hint
V4FMADDPSPacked Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
V4FMADDSSScalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
V4FNMADDPSPacked Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
V4FNMADDSSScalar Single-Precision Floating-Point Fused Multiply-Add (4-iterations)
VEXP2PDApproximation to the Exponential 2^x of Packed Double-Precision Floating-Point Values with Less Than 2^-23 Relative Error
VEXP2PSApproximation to the Exponential 2^x of Packed Single-Precision Floating-Point Values with Less Than 2^-23 Relative Error
VGATHERPF0DPDSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
VGATHERPF0DPSSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
VGATHERPF0QPDSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
VGATHERPF0QPSSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint
VGATHERPF1DPDSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
VGATHERPF1DPSSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
VGATHERPF1QPDSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
VGATHERPF1QPSSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint
VP4DPWSSDDot Product of Signed Words with Dword Accumulation (4-iterations)
VP4DPWSSDSDot Product of Signed Words with Dword Accumulation and Saturation (4-iterations)
VRCP28PDApproximation to the Reciprocal of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error
VRCP28PSApproximation to the Reciprocal of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error
VRCP28SDApproximation to the Reciprocal of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error
VRCP28SSApproximation to the Reciprocal of Scalar Single-Precision Floating-Point Value with Less Than 2^-28 Relative Error
VRSQRT28PDApproximation to the Reciprocal Square Root of Packed Double-Precision Floating-Point Values with Less Than 2^-28 Relative Error
VRSQRT28PSApproximation to the Reciprocal Square Root of Packed Single-Precision Floating-Point Values with Less Than 2^-28 Relative Error
VRSQRT28SDApproximation to the Reciprocal Square Root of Scalar Double-Precision Floating-Point Value with Less Than 2^-28 Relative Error
VRSQRT28SSApproximation to the Reciprocal Square Root of Scalar Single-Precision Floating- Point Value with Less Than 2^-28 Relative Error
VSCATTERPF0DPDSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
VSCATTERPF0DPSSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
VSCATTERPF0QPDSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
VSCATTERPF0QPSSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T0 Hint with Intent to Write
VSCATTERPF1DPDSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
VSCATTERPF1DPSSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
VSCATTERPF1QPDSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write
VSCATTERPF1QPSSparse Prefetch Packed SP/DP Data Values with Signed Dword, Signed Qword Indices Using T1 Hint with Intent to Write